This invention relates to the field of microelectronic devices, and more particularly. to solder bumps for microelectronic devices.
High performance microelectronic devices often use solder balls or solder bumps for electrical and mechanical interconnection to other microelectronic devices. For example, a very large scale integration (VLSI) chip may be electrically connected to a circuit board or other next level packaging substrate using solder balls or solder bumps. This connection technology is also referred to as xe2x80x9cControlled Collapse Chip Connectionxe2x80x94C4xe2x80x9d or xe2x80x9cflip-chipxe2x80x9d technology, and will be referred to herein as xe2x80x9csolder bumpsxe2x80x9d.
A significant advance in this technology is disclosed in U.S. Pat. No. 5,162,257 to Yung entitled xe2x80x9cSolder Bump Fabrication Methodxe2x80x9d and assigned to the assignee of the present invention. In this patent, an under bump metallurgy is formed on the microelectronic substrate including contact pads, and solder bumps are formed on the under bump metallurgy opposite the contact pads. The under bump metallurgy between the solder bumps and the contact pads is converted to an intermetallic which is resistant to etchants used to etch the under bump metallurgy between solder bumps. Accordingly, the base of the solder bumps is preserved.
In many circumstances, it may be desired to provide a solder bump on the substrate at a location remote from the contact pad and also form an electrical connection between the contact pad and the solder bump. For example, a microelectronic substrate may be initially designed for wire bonding with the contact pads arranged around the outer edge of the substrate. At a later time it may be desired to use the microelectronic substrate in an application requiring solder bumps to be placed in the interior of the substrate. In order to achieve the placement of a solder bump on the interior of the substrate away from the respective contact pad, an interconnection or redistribution routing conductor may be necessary.
U.S. Pat. No. 5,327,013 to Moore et al. entitled xe2x80x9cSolder Bumping of Integrated Circuit Diexe2x80x9d discloses a method for forming a redistribution routing conductor and solder bump on an integrated circuit die. This method includes forming a terminal of an electrically conductive, solder-wettable composite material. The terminal includes a bond pad overlying the passivation layer remote from a metal contact and a runner that extends from the pad to the metal contact. A body of solder is reflowed onto the bond pad to form a bump bonded to the pad and electrically coupled through the runner.
In this method, however, the solder bump is formed by pressing a microsphere of a solder alloy onto the bond pad. In addition, the spread of solder along the runner during reflow is limited. In the illustrated embodiment, a solder stop formed of a polymeric solder resist material is applied to the runner to confine the solder to the bond pad.
In many circumstances, it is desirable to form relatively tall solder bumps. For example, taller solder bumps provide a larger opening between a microelectronic chip and substrate in a flip-chip module, which facilitates improved cleaning and underfill. In addition, it is generally excepted that taller solder bumps are more reliable because the straining per unit length is proportionally reduced with the increase in bump height.
A known technique for increasing solder bump height is to increase the volume solder with the same diameter solder pad. However, this technique typically requires more space on the substrate for plating or depositing the additional solder, and/or requires additional process steps. As a consequence, the benefit of increasing the bump height is often offset, at least in part, by the increase in surface area required for a single bump, and or, the additional cost associated with providing additional solder. Other methods of decreasing the strain per unit length in the solder includes casting pillars, posts, or beams of high melting point solder and attaching these to the semiconductor using lower temperture solders.
Notwithstanding the above mentioned references, there continues to exist a need in the art for solder bump structures that are relatively tall, do not require additional surface area, and can be fabricated efficiently and at a reduced cost.
It is therefore an object of the present invention to provide an improved solder bump structure.
It is another object of the present invention to provide solder bump structure with a solder redistribution reservoir for increasing the volume, and thus the height, of the solder bump.
It is another object of the present invention to provide an improved vacuum in a sealed chamber including a microelectronic device.
These and other objects are provided, according to the present invention, by a controlled-shaped solder reservoir which provides additional solder to a bump in the reflow step for increasing the volume of solder forming the solder bump. The controlled shaped reservoirs can be shaped and sized to provide predetermined amounts of solder to the solder bump. Thus, the height of the resulting solder bump can be predetermined, not to mention that the height is greater than that of similar solder bumps without solder redistribution reservoirs because of the additional solder volume added by the reservoirs. To accommodate the stringent space requirement in many microelectronic chip designs, the solder reservoir can be shaped to take a minimum amount of space. Consequently, the solder bumps may have increased height without adding to the space requirements of the solder bump, or without increasing the cost.
Other advantages of the solder structures formed in accordance with the present invention include an increase opening or gap in a flip-chip structure because of the taller solder bumps. This allows for more efficient cleaning of flux and other residues, and more efficient underfilling. The taller solder bumps can also be utilized in conjunction with electrical contact bumps that do not have solder reservoirs so that the contact bumps are elongated by the relatively larger bumps formed with the assistance of the additional solder from the reservoirs. Consequently, the contact bumps are more reliable because the strain is distributed over a greater length (i.e., height) because of the relatively larger volume bumps. Yet another advantage is that the relatively taller solder bumps can be utilized to increase the volume, and thus reduce the pressure, of a sealed chamber in a MEMS vacuum package. This enables a lower pressure vacuum environment to the generated without the equipment typically needed to generate such low pressures vacuums. Further, a single masking step can be used to define both the solder bump structure, including the solder redistribution reservoir, and the under bump metallurgy layer.
In accordance with one embodiment of the present invention, a solder structure on a microelectronic substrate comprises a solder reservoir portion and a solder bump portion, and wherein the solder reservoir portion is non-linear in shape. The solder reservoir portion may wrap around the solder bump portion in order to take up less space. The solder reservoir portion may also wrap substantially around the solder bump portion to substantially envelop the solder bump portion. Alternatively, the solder reservoir portion may spiral partially around or symmetrically wrap around the solder bump portion. In yet another alternative, the solder reservoir portion extends from a proximate end adjacent the solder bump portion to a distal end and partially warps around the solder bump portion with a progressively narrowing width from the proximate end to the distal end. In addition, the solder structure may comprise a plurality of solder reservoir portions extending from the solder bump portion. Preferably, the radially extending solder reservoirs are of substantially equal length, though the reservoirs can be of varying lengths.
Further, the solder reservoir portion may be shaped to create a pressure gradient along the length of the solder reservoir portion during a solder reflow process. Accordingly, the rate of solder flow can be controlled, which may be highly desirable in particular circumstances. The pressure gradient may increase the flow rate of solder to the solder bump portion, or the pressure gradient may decrease the flow rate of solder to the solder bump portion.
In order to reduce the area taken by the solder bump structure, the solder reservoir portion may include a notch for facilitating the removal of the residual solder of the solder reservoir portion subsequent to the solder reflow process. The removal of the residual solder may be further facilitated by the use of high-lead solders which may facilitate the incomplete conversion of copper in the under bump metallurgy. Thus, the remaining copper may be dissolved in the subsequent etch step, thereby allowing the residual solder of the reservoir to break off at the weak point created by the notch, and float away in the etchant.
In accordance with another aspect of the present invention, a solder structure on a microelectronic substrate comprises a solder reservoir portion and a solder bump portion, and wherein the solder reservoir portion has a width which is non-uniform in at least a portion of the reservoir portion. Accordingly, a pressure gradient can be achieved within the solder reservoir to either increase or decrease the flow rate of the solder to the bump structure during the solder flow process. As mentioned above, controlling the flow rate of the solder in the solder flow process may be desirable in certain applications.
In accordance with another aspect of the present invention, a solder structure on a microelectronic substrate comprises a solder reservoir portion and a solder bump portion, wherein the solder reservoir portion extends from the solder bump portion in a continuous line width gradient.
In accordance with yet another aspect of the present invention, a microelectromechanical system (MEMS) module comprises a substrate and a lid in spaced apart relationship, a solder ring which bonds the lid to the substrate to define a sealed chamber therebetween, wherein the solder ring includes at least one solder reservoir associated therewith. In addition, the device includes a MEMS device formed in the chamber.
A second solder ring that is concentrically aligned with the first solder ring may be included, wherein the second solder ring also includes at least one solder reservoir associated therewith. The MEMS module may further comprise elongated electrical contacts within the chamber, wherein the elongated electrical contacts electrically connect the lid to the substrate. Preferably, the chamber is a controlled environment maintained at a vacuum.
In accordance with another aspect of the present invention, a flip-chip structure comprises a substrate and a chip in spaced apart relationship, an elongated contact bump which electrically connects the lid to the substrate, and a plurality of mechanical bumps bonding the chip to the substrate, wherein the mechanical bumps include solder reservoirs associated therewith. The solder reservoirs associated with the mechanical bumps may be non-linear, and may have a non-uniform width portion, as discussed above.
A method in accordance with the present invention for forming a solder bump structure on a microelectronic substrate comprises the steps of forming an under bump metallurgy layer on the microelectronic substrate, and forming a solder structure on the under bump metallurgy layer opposite the microelectronic substrate, wherein the solder structure includes a non-linear solder reservoir portion and a solder bump portion. The step of forming the solder structure may include the step of forming a solder structure including a plurality of solder reservoirs. In addition, the step of forming the solder structure may include the step of forming a solder bump portion and a reservoir which at least partially wraps around the solder bump portion. Yet further, the step of forming the solder structure may include the step of forming a solder structure including a solder reservoir shaped to create a pressure gradient along a length of the solder reservoir.
In accordance with another aspect of the present invention, a method of forming a solder bump structure on a microelectronic substrate comprises the steps of forming an under bump metallurgy layer on the microelectronic substrate, and forming a solder structure on the under bump metallurgy layer opposite the microelectronic substrate, wherein the solder structure included a solder bump portion and a plurality of solder reservoir portions extending therefrom.
In accordance with yet another aspect of the present invention, a method for forming a flip-chip module comprises the steps of forming a contact solder bump structure on a microelectronic substrate, forming a plurality of mechanical solder bump structures on the microelectronic substrate, wherein said mechanical solder bump structures have respective solder reservoirs associated therewith. Since the flow of molten solder from the reservoir to the bump takes time, the present invention provides a means for sequencing aspects of the soldering operation. Further, the method includes the steps of mating the microelectronic substrate to a second substrate, and reflowing the solder of the contact solder bumps and the mechanical solder bumps to bond the microelectronic substrate to the second substrate, wherein the contact solder bump becomes elongated due to the relatively larger mechanical solder bumps that will form after a brief delay.
In accordance with another aspect of the present invention, a method of forming a flip-chip module comprises the steps of forming a solder ring on a microelectronic substrate, wherein said solder ring includes at least one solder reservoir associated therewith, mating the microelectronic substrate to a second substrate in a vacuum environment to define a chamber therebetween, and reflowing the solder of the solder ring to seal the microelectronic substrate to the second substrate and to increase the volume of the chamber. Thus, because of the increased volume of the sealed chamber, the chamber is at a relatively lower pressure than the vacuum environment. The method may further include the step of forming a second solder ring substantially concentrically aligned with the solder ring, wherein the second solder ring includes at least one solder reservoir associated therewith.
Other features and advantages of the present invention will become apparent to one that is skilled in the art upon examination of the following drawings and detailed description. It is intended that all such additional features and advantages be included herein within the scope of the present invention, as defined in the appended claims.